changeset 1106:ab726c059750

More pyflakes "fixes".
author Martin Geisler <mg@daimi.au.dk>
date Fri, 20 Feb 2009 10:20:34 +0100
parents 1d5f01ddd720
children 88ac6ac5fe70 febb63e773e4
files apps/benchmark.py viff/test/test_util.py
diffstat 2 files changed, 11 insertions(+), 12 deletions(-) [+]
line wrap: on
line diff
--- a/apps/benchmark.py	Fri Feb 20 10:00:48 2009 +0100
+++ b/apps/benchmark.py	Fri Feb 20 10:20:34 2009 +0100
@@ -140,9 +140,11 @@
 
 if options.fake:
     print "Using fake field elements"
-    GF = FakeGF
+    Field = FakeGF
+else:
+    Field = GF
 
-Zp = GF(find_prime(options.modulus))
+Zp = Field(find_prime(options.modulus))
 print "Using field elements (%d bit modulus)" % log(Zp.modulus, 2)
 
 count = options.count
--- a/viff/test/test_util.py	Fri Feb 20 10:00:48 2009 +0100
+++ b/viff/test/test_util.py	Fri Feb 20 10:20:34 2009 +0100
@@ -21,8 +21,7 @@
 
 from viff.util import deep_wait
 from viff.field import GF, GF256
-import viff.shamir
-import viff.prss
+from viff import shamir, prss
 
 from twisted.trial.unittest import TestCase
 from twisted.internet.defer import Deferred
@@ -36,7 +35,7 @@
 
     # Modules which will be reloaded with and without VIFF_FAKE set in
     # the environment.
-    _modules = [viff.shamir, viff.prss]
+    _modules = [shamir, prss]
 
     def setUp(self):
         self.field = GF(1031)
@@ -51,29 +50,27 @@
             reload(module)
 
     def test_shamir_share(self):
-        from viff.shamir import share
         secret = self.field(17)
-        shares = share(secret, 1, 3)
+        shares = shamir.share(secret, 1, 3)
         self.assertEquals(shares[0][1], secret)
         self.assertEquals(shares[1][1], secret)
         self.assertEquals(shares[2][1], secret)
 
     def test_shamir_recombine(self):
-        from viff.shamir import recombine
         shares = [(1, 1), None, None]
-        self.assertEquals(recombine(shares), 1)
+        self.assertEquals(shamir.recombine(shares), 1)
 
     def test_prss(self):
-        share = viff.prss.prss(None, None, self.field, None, None)
+        share = prss.prss(None, None, self.field, None, None)
         self.assertEquals(share, self.field(7))
 
     def test_prss_lsb(self):
-        (share, bit) = viff.prss.prss_lsb(None, None, self.field, None, None)
+        (share, bit) = prss.prss_lsb(None, None, self.field, None, None)
         self.assertEquals(share, self.field(7))
         self.assertEquals(bit, GF256(1))
 
     def test_prss_zero(self):
-        share = viff.prss.prss_zero(None, None, None, self.field, None, None)
+        share = prss.prss_zero(None, None, None, self.field, None, None)
         self.assertEquals(share, self.field(0))