viff

changeset 607:626cd75d75fb

Really fix Issue 24: Use base-2 logarithm.
author Martin Geisler <mg@daimi.au.dk>
date Tue, 25 Mar 2008 19:18:11 +0100
parents ab8ab275dbd2
children c4c1544e9b7b
files viff/comparison.py
diffstat 1 files changed, 1 insertions(+), 1 deletions(-) [+]
line diff
     1.1 --- a/viff/comparison.py	Tue Mar 25 15:08:22 2008 +0100
     1.2 +++ b/viff/comparison.py	Tue Mar 25 19:18:11 2008 +0100
     1.3 @@ -157,7 +157,7 @@
     1.4      @increment_pc
     1.5      def convert_bit_share(self, share, dst_field):
     1.6          """Convert a 0/1 share into dst_field."""
     1.7 -        l = self.options.security_parameter + math.log(dst_field.modulus)
     1.8 +        l = self.options.security_parameter + math.log(dst_field.modulus, 2)
     1.9          # TODO assert field sizes are OK...
    1.10  
    1.11          this_mask = rand.randint(0, (2**l) -1)